Two leading computing visionaries will speak at the GPU Technology Conference (GTC) in September. Prof. Klaus Schulten, renowned computational biologist from the University of Illinois at Urbana-Champaign, will deliver a keynote highlighting discoveries made using the ‘computational microscope.’ Prof. Sebastian Thrun, robotics pioneer at Stanford University and distinguished engineer at Google, will speak on advances in GPU computing in computer vision and robotics. Registration is still open at www.nvidia.com/gtc.
GPU Tech Conference Keynotes Announced
August 28th, 2010HiBi 2010 deadline extension to July 1
June 18th, 2010In response to the large number of requests from the community, the organizing committee of HiBi 2010 extend the deadline for paper and abstract submission from Monday June 21 to Thursday July 1, 2010.
The HiBi workshop establishes a forum to link researchers in the areas of parallel computing and computational systems biology. One of the main limitations in managing models of biological systems comes from the fundamental difference between the high parallelism evident in biochemical reactions and the sequential environments employed for the analysis of these reactions. Such limitations affect all varieties of continuous, deterministic, discrete and stochastic models; undermining the applicability of simulation techniques and analysis of biological models. The goal of HiBi is therefore to bring together researchers in the fields of high performance computing and computational systems biology. Experts from around the world will present their current work, discuss profound challenges, new ideas, results, applications and their experience relating to key aspects of high performance computing in biology.
Submit GTC 2010 Proposals by June 1
May 20th, 2010The GPU Technology Conference (GTC 2010) will be held Sept. 20-23, 2010 in San Jose, Calif. Developers, researchers, scientists and entrepreneurs are invited to submit proposals on GPU-related topics. See www.nvidia.com/gtc.
GPU Developers Summit: Session Topics deadline: June 1, 2010
Emerging Companies Summit: “CEO on Stage” Nominations deadline: August 1, 2010
NVIDIA Research Summit: Posters deadline: August 15, 2010
To submit a proposal, you will be asked to set up a GTC 2010 account so you can track the status of your submission.
Submission guidelines: www.nvidia.com/object/call_for_submissions.html
Join GTC 2010 mailing list: www.nvidia.com/object/email_updates.html
NVIDIA Announces GPU Technology Conference 2010
March 31st, 2010This year’s GPU Technology Conference (GTC 2010) will take place on Monday, Sept. 20 to Thursday, Sept. 23 at the San Jose Convention Center in San Jose, California.
Building on last year’s inaugural conference, GTC 2010 will feature an even broader and deeper selection of technical sessions, interactive tutorials, technology previews, and industry and academic presentations.
Three concurrent GPU-focused summits will occur under one roof:
- Emerging Companies Summit: A showcase for innovative startups to demonstrate products and network with VC’s and other investors.
- GPU Developers Summit: Sessions, tutorials, and presentations for developers, engineers, and scientists.
- NVIDIA Research Summit: A unique opportunity for students, professors, and researchers to present their findings and collaborate.
For more information:
- Join the GTC 2010 mailing list for updates.
- See GTC Call for Submissions to learn about submitting content.
- To inquire about being a sponsor or exhibitor, visit GTC Sponsors/Exhibitors.
Call for Papers: META’10, Metaheuristics on GPUs
March 11th, 2010The 3rd International Conference on Metaheuristics and Nature Inspired Computing, META’10, features a special session on Metaheuristics on graphics hardware, organized by Geir Hasle and Trond Runar Hagen. It focuses on the utilization of modern commodity computer architectures, in particular Graphics Processing Units (GPUs), to enhance the performance of metaheuristics. A broad spectrum of papers is invited, ranging from case studies focused on specific problems and applications to theoretical aspects and frameworks.
The conference will take place October 28-30, 2010, on Djerba Island, Tunisia. More information is available at the conference web page.
CfP: High performance computational systems Biology
February 8th, 2010The HiBi workshop establishes a forum to link researchers in the areas of parallel computing and computational systems biology. One of the main limitations in managing models of biological systems comes from the fundamental difference between the high parallelism evident in biochemical reactions and the sequential environments employed for the analysis of these reactions. Such limitations affect all varieties of continuous, deterministic, discrete and stochastic models; undermining the applicability of simulation techniques and analysis of biological models. The goal of HiBi is therefore to bring together researchers in the fields of high performance computing and computational systems biology. Experts from around the world will present their current work, discuss
profound challenges, new ideas, results, applications and their experience relating to key aspects of high performance computing in biology.
Topics of interest include, but are not limited to:
- Parallel stochastic simulation
- Biological and Numerical parallel computing
- Parallel and distributed architectures
- Emerging processing architecture: Cell processors, GPUs, mixed CPU-FPGA, etc.
- Parallel model checking techniques
- Parallel parameter estimation
- Parallel algorithms for biological analysis
- Application of concurrency theory to biology
- Parallel visualization algorithms
- Web-services and Internet computing for e-Science
- Tools and applications
More Information: http://www.cosbi.eu/hibi2010/
CfP: High Performance Graphics 2010
February 7th, 2010High-Performance Graphics 2010 continues last year’s success at synthesizing two important and cutting-edge topics in computer graphics, the previous Graphics Hardware and Interactive Ray Tracing conferences. The scope of the conference is the overarching field of performance-oriented graphics systems, covering innovative algorithms, efficient implementations, and hardware architecture. This broader focus offers a common forum bringing together researchers, engineers, and architects to discuss the complex interactions of massively parallel hardware, novel programming models, efficient graphics algorithms, and innovative applications.
The program features three days of paper and industry presentations, with ample time for discussions during breaks, lunches, and the conference banquet. The conference, which will take place on June 25-27, is co-located with Eurographics Rendering Symposium on the campus of the Max-Planck Institut Informatik, Saarland University, Saarbrucken, Germany.
Original and innovative performance-oriented contributions are invited from all areas of graphics, including hardware architectures, rendering, physics, animation, AI, simulation, data structures, with topics including (but not limited to):
- New graphics hardware architectures
- Rendering architectures and algorithms
- Parallel computing for graphics (including GPU Computing)
- Algorithmic foundations
- Languages and compilation
The conference website with additional information is located at http://www.highperformancegraphics.org.
CFP: FGC 2010 – The First International Workshop on Frontier of GPU Computing
January 15th, 2010This workshop will be held in conjunction with CIT 2010, Bradford, UK, 29 June – 01 July, 2010. From the announcement:
We are undergoing a new revolution in parallel processor technologies, especially the Graphics Processing Units. GPUs have become widely used nowadays to accelerate a broad range of applications, including computational finance, numerical computing, image/video processing, engineering simulations, quantum chemistry, just to name a few.
The goal of this workshop is to provide a forum for researchers and practitioners to discuss and share their research and development experiences and outputs on the massively parallel GPU platforms, software development tools, optimization techniques, parallel algorithm design, and all kinds of successful applications. We solicit original and previously unpublished papers addressing research challenges and advances towards the design, implementation and evaluation of massively parallel GPU computing.
CFP: Frontiers of GPU, Multi- and Many-Core Systems Workshop at CCGrid 2010
December 11th, 2009Multi- and many-core microprocessors are being deployed in a broad spectrum of applications including Clusters, Clouds and Grids. Both conventional multi- and many-core processors, such as Intel Nehalem and IBM Power7 processors, and unconventional many-core processors, such as NVIDIA Tesla and AMD FireStream GPUs, hold the promise of increasing performance through parallelism. However, GPU approaches in parallelism are distinctly different from those of conventional multi- and many-core processors, which raises new challenges: For example, how do we optimize applications for conventional multi- and many-core processors? How do we reengineer applications to take advantage of GPUs’ tremendous computing power in a reasonable cost-benefit ratio? What are effective ways of using GPUs as accelerators? The goals of this workshop are to discuss these and other issues and bring together developers of application algorithms and experts in utilizing multi- and many-core processors. Accepted papers will be published in the CCGRID proceedings. Selected papers will be published in a special issue of the Journal Concurrency and Computation: Practice and Experience.
Topics of interests include (but not limited to): Read the rest of this entry »
Supercomputing 2009 birds-of-a-feather session on “The Art of Performance Tuning for CUDA and Manycore Architectures”
December 2nd, 2009High throughput architectures for HPC seem likely to emphasize many cores with deep multithreading, wide SIMD, and sophisticated memory hierarchies. GPUs present one example, and their high throughput has led a number of researchers to port computationally intensive applications to NVIDIA’s CUDA architecture.
This session explored the art of performance tuning for CUDA using several case studies. Topics included profiling to identify bottlenecks, effective use of the GPU’s memory hierarchy and DRAM interface to maximize bandwidth, data versus task parallelism, and avoiding SIMD divergence. Many of the lessons learned in the context of CUDA are likely to apply to other many-core architectures used in HPC applications.