Facing the Multicore Challenge III

July 14th, 2012

Update: Deadline extension to  July 28, 2012

Submissions are cordially invited for MCC-III, to be held in Stuttgart, Germany, September 19-21. This conference is the 3rd in a series, starting in 2010 in Heidelberg at the Heidelberg Academy of Sciences (HAW) and 2011 at the Karlsruhe Institute of Technology (KIT) and the Engineering Mathematics and Computing Lab (EMCL). It aims to combine new aspects of multi-/manycore microprocessor technologies, parallel applications, numerical simulation, software development and tools. Contributions are welcome from all participating disciplines. Particular emphasis is placed on the support and advancement of young scientists, in addition to high-quality invited keynote talks and tutorials. More information including the full call for papers, topics of interest and submission instructions: http://www.multicore-challenge.org

Implementing a code generator for fast matrix multiplication in OpenCL on the GPU

July 11th, 2012


This paper presents results of an implementation of code generator for fast general matrix multiply (GEMM) kernels. When a set of parameters is given, the code generator produces the corresponding GEMM kernel written in OpenCL. The produced kernels are optimized for high-performance implementation on GPUs from AMD. Access latencies to GPU global memory is the main drawback for high performance. This study shows that storing matrix data in a block-major layout increases the performance and stability of GEMM kernels. On the Tahiti GPU (Radeon HD 7970), our DGEMM (double-precision GEMM) and SGEMM (single-precision GEMM) kernels achieve the performance up to 848 GFlop/s (90% of the peak) and 2646 GFlop/s (70%), respectively.

(K. Matsumoto, N. Nakasato, S. G. Sedukhin: “Implementing a code generator for fast matrix multiplication in OpenCL on the GPU”, accepted for Special Session: Auto-Tuning for Multicore and GPU (ATMG), IEEE 6th International Symposium on Embedded Multicore SoCs (MCSoC-12), Sep. 2012. [PDF])

A Study of Persistent Threads Style GPU Programming for GPGPU Workloads

July 4th, 2012


In this paper, we characterize and analyze an increasingly popular style of programming for the GPU called Persistent Threads (PT). We present a concise formal definition for this programming style, and discuss the difference between the traditional GPU programming style (nonPT) and PT, why PT is attractive for some high-performance usage scenarios, and when using PT may or may not be appropriate. We identify limitations of the nonPT style and identify four primary use cases it could be useful in addressing— CPU-GPU synchronization, load balancing/irregular parallelism, producer-consumer locality, and global synchronization. Through micro-kernel benchmarks we show the PT approach can achieve up to an order-of-magnitude speedup over nonPT kernels, but can also result in performance loss in many cases. We conclude by discussing the hardware and software fundamentals that will influence the development of Persistent Threads as a programming style in future systems.

(Kshitij Gupta, Jeff A. Stuart and John D. Owens: “A Study of Persistent Threads Style GPU Programming for GPGPU Workloads”, Proceedings of Innovative Parallel Computing, May 2012. [WWW])

CfP:Special Issue Advanced Software Development of GPU Cluster Computing

June 28th, 2012

General purpose GPU recently has successfully drawn attention from high-performance computing due to higher core density and lower EPI value than CPU. The newest report of Top500 shows that there are thirty-nine supercomputing systems using GPUs to accelerate data computation: two Chinese systems called Tianhe-1A and Nebulaeare at No. 2 and No. 4 and one Japanese system called Tsubame 2.0 at No. 5 are on this list. Amazon has announced the availability of Cluster GPU Instances for Amazon EC2 to deliver the computational power of GPUs in Clouds. More and more researchers have used GPU clusters instead of CPU clusters for resolving their massive-computation problems such as high energy physics, scientific simulation, data mining, climate forecast, and earthquake prediction. As the impact of GPU on both of the academic and engineering areas is increasing rapidly, many issues of GPU cluster computing have to be addressed further in order for improving and enriching the user experience and applications of GPU cluster computing. For example, the complexity of the GPU programming such as CUDA and OpenCL is too high for users to move their applications towards this new computing platform since these programming interfaces and models are quite different from MPI or OpenMP, which are popularly used in CPU cluster computing. In addition, users lack friendly and efficient tools such as debugger and performance analyzer during the period of program development. On the other hand, the computing systems built on GPU clusters require useful tools in emergence to effectively monitor and manage GPU resources for system throughput and to maintain the QoS and reliability of the execution of user applications. As previously described, this special issue is aimed at providing a forum for researchers to present their innovative design, implementation, and experience in software of GPU cluster computing. We encourage authors to submit high-quality, original, unpublished papers. Potential topics include, but are not limited to:

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SnuCL – OpenCL heterogeneous cluster computing

June 27th, 2012

SnuCL is an OpenCL framework and freely available, open-source software developed at Seoul National University. It naturally extends the original OpenCL semantics to the heterogeneous cluster environment. The target cluster consists of a single host node and multiple compute nodes. They are connected by an interconnection network, such as Gigabit and InfiniBand switches. The host node contains multiple CPU cores and each compute node consists of multiple CPU cores and multiple GPUs. For such clusters, SnuCL provides an illusion of a single heterogeneous system for the programmer. A GPU or a set of CPU cores becomes an OpenCL compute device. SnuCL allows the application to utilize compute devices in a compute node as if they were in the host node. Thus, with SnuCL, OpenCL applications written for a single heterogeneous system with multiple OpenCL compute devices can run on the cluster without any modifications. SnuCL achieves both high performance and ease of programming in a heterogeneous cluster environment.

SnuCL consists of SnuCL runtime and compiler. The SnuCL compiler is based on the OpenCL C compiler in SNU-SAMSUNG OpenCL framework. Currently, the SnuCL compiler supports x86, ARM, and PowerPC CPUs, AMD GPUs, and NVIDIA GPUs.

Acceleware OpenCL and CUDA Training

June 27th, 2012

Acceleware has announced two training courses:

Developed in partnership with AMD, this four day course, August 21-24,2012, is designed for GPU Programmers who are looking to develop comprehensive skills in writing and optimizing applications that fully leverage the multi-core processing capabilities of the GPU. Register before July 31 and receive $200 off your course fee! Enter promotional code AXTEB2012.

Partnering with NVIDIA, this four day course (July 17-20, 2012) is designed for Programmers who are looking to develop comprehensive skills in writing and optimizing applications that fully leverage the multi-core processing capabilities of the GPU.

C++ AMP Courses

June 26th, 2012

C++ Accelerated Massive Parallelism (C++ AMP) is a new open specification heterogeneous programming model, which builds on the established C++ language. Developed for heterogeneous platforms/computing C++ AMP is designed to accelerate the execution of your C++ code by taking advantage of the data-parallel hardware that is commonly present as a GPU and multi-core CPU. This four day course is aimed at programmers who are looking to develop comprehensive skills in writing and optimizing applications using C++ AMP.

Delivered by Acceleware’s Developers (as opposed to trained trainers!), the course is designed for programmers looking to acquire comprehensive skills in accelerating applications through parallel programming. Read the rest of this entry »

Beyond3D C++ AMP contest

June 25th, 2012

Beyond3D’s first C++ AMP focused contest accepts submissions until August 31, 2012. The contest’s goal is to use parallel programming in order to speed up solving the Traveling Salesman’s Problem. All relevant details are provided on the contest’s dedicated page.

Automatic tuning of the sparse matrix vector product on GPUs based on the ELLR-T approach

June 22nd, 2012


A wide range of applications in engineering and scientific computing are involved in the acceleration of the sparse matrix vector product (SpMV). Graphics Processing Units (GPUs) have recently emerged as platforms that yield outstanding acceleration factors. SpMV implementations for GPUs have already appeared on the scene. This work is focused on the ELLR-T algorithm to compute SpMV on GPU architecture, its performance is strongly dependent on the optimum selection of two parameters. Therefore, taking account that the memory operations dominate the performance of ELLR-T, an analytical model is proposed in order to obtain the auto-tuning of ELLR-T for particular combinations of sparse matrix and GPU architecture. The evaluation results with a representative set of test matrices show that the average performance achieved by auto-tuned ELLR-T by means of the proposed model is near to the optimum. A comparative analysis of ELLR-T against a variety of previous proposals shows that ELLR-T with the estimated configuration reaches the best performance on GPU architecture for the representative set of test matrices.

(Francisco Vázquez and José Jesús Fernández and Ester M. Garzón: “Automatic tuning of the sparse matrix vector product on GPUs based on the ELLR-T approach”, Parallel Computing 38(8), 408-420, Aug. 2012. [DOI])

Frequent Items Mining Acceleration Exploiting Fast Parallel Sorting on the GPU

June 20th, 2012


In this paper, we show how to employ Graphics Processing Units (GPUs) to provide an efficient and high performance solution for finding frequent items in data streams. We discuss several design alternatives and present an implementation that exploits the great capability of graphics processors in parallel sorting. We provide an exhaustive evaluation of performances, quality results and several design trade-offs. On an off-the-shelf GPU, the fastest of our implementations can process over 200 million items per second, which is better than the best known solution based on Field Programmable Gate Arrays (FPGAs) and CPUs. Moreover, in previous approaches, performances are directly related to the skewness of the input data distribution, while in our approach, the high throughput is independent from this factor.

(Ugo Erra, Bernardino Frola: “Frequent Items Mining Acceleration Exploiting Fast Parallel Sorting on the GPU”, Procedia Computer Science 9, pp 86-95 (Proceedings of the International Conference on Computational Science), 2012. [DOI])

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