HiBi 2010 deadline extension to July 1

June 18th, 2010

In response to the large number of requests from the community, the organizing committee of HiBi 2010 extend the deadline for paper and abstract submission from Monday June 21 to Thursday July 1, 2010.

The HiBi workshop establishes a forum to link researchers in the areas of parallel computing and computational systems biology. One of the main limitations in managing models of biological systems comes from the fundamental difference between the high parallelism evident in biochemical reactions and the sequential environments employed for the analysis of these reactions. Such limitations affect all varieties of continuous, deterministic, discrete and stochastic models; undermining the applicability of simulation techniques and analysis of biological models. The goal of HiBi is therefore to bring together researchers in the fields of high performance computing and computational systems biology. Experts from around the world will present their current work, discuss profound challenges, new ideas, results, applications and their experience relating to key aspects of high performance computing in biology.

Workshop on GPU Programming for Molecular Modeling, August 6-8,2010, University of Illinois

June 18th, 2010
GPU-Accelerated Ion Placement

GPU-Accelerated Ion Placement

The Theoretical and Computational Biophysics Group, NIH Resource for Macromolecular Modeling and Bioinformatics (www.ks.uiuc.edu) at the University of Illinois at Urbana-Champaign, presents a Workshop on GPU Programming for Molecular Modeling to be held August 6-8, 2010, at the Beckman Institute for Advanced Science and Technology, on the University of Illinois campus in Urbana, Illinois, USA. Application, selection, and notification of participants is on-going through July 29, 2010.

Note: Participants are encouraged to attend the multi-site “Proven Algorithmic Techniques for Many-core Processors” workshop the preceding week (August 2-6) at the location of their choice. Registration for this workshop is required for participants without equivalent GPU-programming training or experience.

Intel Releases Knights Corner

June 2nd, 2010

At ISC’10, Intel demonstrated their co-processor approach to HPC (formerly known as Larrabee, now codenamed Knights Corner). A prototype of the Intel Many Integrated Core (MIC) architecture with 32 in-order cores, each equipped with a 512-wide vector unit and connected via an on-chip coherent cache, delivered more than half a Teraflop performance for LU decomposition in a live demonstration during a keynote by Kirk Skaugen.

The full press release from ISC’10 is available here.

Australia GPU Users Groups

June 1st, 2010

The Australia GPU Users groups are informal special interest groups founded to bring together GPU users from all fields and experience levels to learn and share their ideas and creations at friendly meetings.  There are currently GPU users groups forming in Brisbane, Sydney, and Perth.

The groups will discuss general GPU computing, including GPGPU, CUDA, OpenCL, DirectCompute, DirectX and OpenGL and related technologies. There will be short presentations during the meetings, as well as informal discussions on a range of subjects, including core fundamentals, hardware architectures, parallel programming as well as specific optimisations and also examples of applications from different fields of industry, science and multimedia.

Sign up today: the meetings will allow you to meet others who share your interest in GPUs.

GPGPU.org is maintaining a list of GPU Users groups.  If you have a local GPU users group, please tell us about it!

CFP: First International Workshop on Accelerating Data Management Systems Using Modern Processor and Storage Architectures (ADMS’10), Colocated with VLDB 2010

June 1st, 2010

The objective of this one-day workshop is to investigate opportunities in accelerating data management systems and workloads (which include traditional OLTP, data warehousing/OLAP, ETL, Streaming/Realtime, and XML/RDF Processing) using various processor architectures  (e.g., commodity and specialized Multi-core CPUs, Many-core GPUs, and FPGAs), storage systems (e.g., Storage-class Memories like SSDs and Phase-change Memory), and multicore programming strategies like OpenCL.

More information and the full call can be found here: http://www.adms-conf.org/

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GPU Supercomputer #2 in Top500

May 31st, 2010

The June 2010 Top500 list of the world’s fastest supercomputers was released this week at ISC 2010.  While the US Jaguar supercomputer (located at the Department of Energy’s Oak Ridge Leadership Computing Facility) retained the top spot in Linpack performance, a Chinese cluster called Nebulae, built from a Dawning TC3600 Blade system with Intel X5650 processors and NVIDIA Tesla C2050 GPUs is now the fastest in theoretical peak performance at 2.98 PFlop/s and No. 2 with a Linpack performance of 1.271 PFlop/s. This is the highest rank a GPU-accelerated system, or a Chinese system, has ever achieved on the Top500 list.

For more information, visit www.TOP500.org.

Introductory Tutorial to OpenCL™ for HPC at SAAHPC’10

May 30th, 2010

AMD is offering an introductory tutorial to OpenCL™ that will be held alongside the 2010 Symposium on Application Accelerators in High Performance Computing (SAAHPC’10). The tutorial is a “programmer’s introduction” which covers the ideas behind OpenCL™ and their translation to source code. Read the rest of this entry »

IPDPS 2011 CALL FOR PARTICIPATION

May 20th, 2010

Abstracts due…24 September 2010
Papers due…1 October 2010

Anchorage, home to moose, bears, birds and whales, is strategically located at almost equal flying distance from Europe, Asia and the Eastern USA. Embraced by six mountain ranges, with views of Mount McKinley in Denali National Park, and warmed by a maritime climate, the area offers year-round adventure, recreation, and sporting events. It is a fitting destination for IPDPS to mark a quarter century of tracking developments in computer science.  IPDPS serves as a forum for engineers and scientists from around the world to present their latest research findings in the fields of parallel processing and distributed computing. The five-day program will follow the usual format of contributed papers, invited speakers, and panels mid week, framed by workshops held on the first and last days.  To celebrate the 25th year of IPDPS, plan to come early and stay late and also enjoy a modern city surrounded by spectacular wilderness. For updates on IPDPS 2011, visit the Web at www.ipdps.org.

Submit GTC 2010 Proposals by June 1

May 20th, 2010

The GPU Technology Conference (GTC 2010) will be held Sept. 20-23, 2010 in San Jose, Calif. Developers, researchers, scientists and entrepreneurs are invited to submit proposals on GPU-related topics. See www.nvidia.com/gtc.

GPU Developers Summit: Session Topics deadline: June 1, 2010
Emerging Companies Summit: “CEO on Stage” Nominations deadline: August 1, 2010
NVIDIA Research Summit: Posters deadline: August 15, 2010

To submit a proposal, you will be asked to set up a GTC 2010 account so you can track the status of your submission.

Submission guidelines: www.nvidia.com/object/call_for_submissions.html
Join GTC 2010 mailing list: www.nvidia.com/object/email_updates.html

CfP: SPIE Electronic Imaging 111: Parallel Processing for Imaging Applications

May 13th, 2010

Imaging translates information into and out of the visual system with today’s computation engine of choice: digital electronic systems. While scalar architectures are no longer scaling at historical rates, we see a massive explosion in the total number of connected computation devices and the ways that hardware architectures and software parallel programming environments use these devices to work in concert and in parallel. From the computing cloud to map-reduce programming models and systems to multi-core CPUs to the regular layout of graphics processing units (GPUs) to the increasing capacity of FPGA fabrics, a range of parallel architectures and parallel programming environments are available to designers and researchers to solve computationally complex problems in efficient (and often real-time) imaging applications.

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