The first NTU workshop on GPU supercomputing was held at NTU on January 16, 2009. Organized by the Center for Quantum Science and Engineering (CQSE) at National Taiwan University, This workshop consisted of seminars on applications of GPU/CUDA in high performance computations in science and engineering, as well as other fields. Slides from the presentations are now online.
Scott Sherman from Bjorn3D is holding a “Fold for Stephanie” month in support of his 13-year-old daughter who has Hodgkins stage 4B cancer. He is even giving away an XFX NVIDIA GeForce GTX 285 GPU to the highest folder for Stephanie. For more information, see the Bjorn 3D Forums.
The University of Illinois at Urbana-Champaign is launching a 13-week seminar series that will focus on emerging applications for parallel computing. The Need for Speed Seminar Series will feature world-class applications experts and researchers who will discuss what increased computing performance means for their fields. The series will bring together hardware engineers and software developers who require parallel processing to create faster and superior applications. Speakers will help forecast breakthroughs enabled by the rapid advances in computing performance per dollar, performance per watt, or storage capacity provided by Moore’s Law.
David Kirk, NVIDIA Fellow, will kick off the series with a special keynote on January 28. Following that, the Need for Speed series will be held at 4pm CT every Wednesday until April 29 at the UI’s Coordinated Science Laboratory. Seminars will also stream live over the internet and speakers will take questions from both in-house and online audience members. To learn more about the series, or to view the live seminars, please visit the Need for Speed seminar web page.
(Editor’s Note: this news was submitted after the talk occurred.)
February 5, 2009, 11am PST / 2pm EST
Are you looking for ways to improve your productivity by accelerating MATLAB functions? Now you can with the unprecedented performance of GPU computing.
By attending this webinar, you will learn:
- What is GPU computing
- What is NVIDIA CUDA parallel computing architecture
- What is the Jacket engine for MATLAB from AccelerEyes
- How to get 10x to 50x speed-up for several MATLAB functions
Date: Thursday, February 5, 2009
Time: 11:00am PST / 2:00pm EST
Duration: 45 Minute Presentation, 15 Minute Q&A
Presented By: Sumit Gupta, Ph.D., Sr Product Manager of Tesla GPU Computing at NVIDIA and John Melonakos, Ph.D., CEO at AccelerEyes LLC
What do GPUs, FPGAs, vector processors and other special-purpose chips have in common? They are examples of advanced processor architectures that the scientific community is using to accelerate computationally demanding applications. While high-performance computing systems that use application accelerators are still rare, they will be the norm rather than the exception in the near future. The 2009 Symposium on Application Accelerators in High-Performance Computing aims to bring together developers of computing accelerators and end-users of the technology to exchange ideas and learn about the latest developments in the field. The Symposium will focus on the use of application accelerators in high-performance and scientific computing and issues that surround it. Topics of interest include:
- novel accelerator processors, systems, and architectures
- integration of accelerators with high-performance computing systems
- programming models for accelerator-based computing
- languages and compilers for accelerator-based computing
- run-time environments, profiling and debugging tools for accelerator-based computing
- scientific and engineering applications that use application accelerators
Presentations from technology developers and the academic user community are invited. Researchers interested in presenting at the Symposium should submit extended abstracts of 2-3 pages to firstname.lastname@example.org by April 20, 2009. All submissions will be reviewed by the Technical Program Committee and accepted submissions will be presented as either oral presentations or posters. Presentation materials will be made available online at www.saahpc.org.
(2009 Symposium on Application Accelerators in High Performance Computing (SAAHPC’09). July 27-31, 2009, University of Illinois, Urbana, IL)
This workshop, to be held at TU Delft on Friday January 30, 2009, presents state-of-the-art performance results for engineering applications on parallel machines, based on either the Cell Processor or on GPUs. Next to iterative solvers, finite element applications, tomography and visualization applications, some background information on computation on these platforms and coupling of processors will be shown. To attend this workshop is free, registration is required. (Workshop: Experience with the GPU and the Cell Processor)
This workshop will focus on compilation techniques for exploiting parallelism in emerging massively multi-threaded and multi-core architectures, with a particular focus on the use of general-purpose GPU computing techniques to overcome traditional barriers to parallelization. Recently, GPUs have evolved to address programming of general-purpose computations, especially those exemplified by data-parallel models. This change will have long-term implications for languages, compilers, and programming models. Development of higher-level programming languages, models and compilers that exploit such processors will be important. Clearly, the economics and performance of applications is affected by a transition to general-purpose GPU computing. This will require new ideas and directions as well as recasting some older techniques to the new paradigm.
EPHAM 2009 invites papers in this emerging discipline which include, but are not limited, to the following areas of interest.
- Static and dynamic parallelization for hybrid CPU/GPU systems
- Compiler optimizations for GPU computing
- Language constructs and extensions to enable parallel programming with GPUs
- Run-time techniques to off-load computation to the GPU
- Language, programming model, or compiler techniques for mapping irregular computations to GPUs
- Debugging support for GPU programs
- Performance analysis tools related to GPU computing
- Other hardware-assisted methods for extracting and exploiting parallelism
Please find more information at the EPHAM 2009 workshop website.
The complete course notes from the “Parallel Computing for Graphics: Beyond Programmable Shading” SIGGRAPH Asia 2008 course , are available online. The course gives an introduction to parallel programming architectures and environments for interactive graphics and explores case studies of combining traditional rendering API usage with advanced parallel computation from game developers, researchers, and graphics hardware vendors. There are strong indications that the future of interactive graphics involves a programming model more flexible than today’s OpenGL and Direct3D pipelines. As such, graphics developers need a basic understanding of how to combine emerging parallel programming techniques with the traditional interactive rendering pipeline. This course gives an introduction to several parallel graphics architectures and programming environments, and introduces the new types of graphics algorithms that will be possible. The case studies in the class discuss the mix of parallel programming constructs used, details of the graphics algorithms, and how the rendering pipeline and computation interact to achieve the technical goals. The course speakers are Jason Yang and Justin Hensley (AMD), Tim Foley (Intel), Mark Harris (NVIDIA), Kun Zhou (Zhejiang University), Anjul Patney (UC Davis), Pedro Sander (HKUIST), and Christopher Oat (AMD) (Complete course notes.)
The complete course notes from the “Beyond Programmable Shading” SIGGRAPH 2008 course , are available online. The course gives an introduction to parallel programming architectures and environments for interactive graphics and explores case studies of combining traditional rendering API usage with advanced parallel computation from game developers, researchers, and graphics hardware vendors. There are strong indications that the future of interactive graphics involves a programming model more flexible than today’s OpenGL and Direct3D pipelines. As such, graphics developers need a basic understanding of how to combine emerging parallel programming techniques with the traditional interactive rendering pipeline. This course gives an introduction to several parallel graphics architectures and programming environments, and introduces the new types of graphics algorithms that will be possible. The case studies in the class discuss the mix of parallel programming constructs used, details of the graphics algorithms, and how the rendering pipeline and computation interact to achieve the technical goals. The course organizers are Aaron Lefohn (Intel) and Mike Houston (AMD). Additional course speakers include Kayvon Fatahalian (Stanford), David Luebke (NVIDIA), Tom Forsyth (Intel), John Owens (UC Davis), Chas Boyd (Microsoft), Aaftab Munshi (Apple), Fabio Pellacini (Dartmouth), Jon Olick (Id Software), Matt Pharr (Intel), and Jeremy Shopf (AMD). (Complete course notes)
As the computing power of various platforms intended for games and similar applications is increasing rapidly, they attract the interest of professionals in the HPC community. As an example, modern graphics processing units (GPUs) are often used for HPC in GPGPU. Another example is the Cell Broadband Engine of the Playstation3 (PS3) that has a multicore architecture that lends itself for HPC. These platforms are not conventional HPC platforms; nonetheless they are used for HPC purposes and even clusters of such computing resources are being built with great success. Both the computing power and the low cost compared to conventional HPC resources make them very interesting. The aim of this workshop is to focus on such unconventional resources for HPC. Only imagination sets the limit for the kinds of devices that can be used for HPC end even be combined to form clusters. (UCHPC ’09 Website, Call for Papers)