High-Performance Graphics 2010 continues last year’s success at synthesizing two important and cutting-edge topics in computer graphics, the previous Graphics Hardware and Interactive Ray Tracing conferences. The scope of the conference is the overarching field of performance-oriented graphics systems, covering innovative algorithms, efficient implementations, and hardware architecture. This broader focus offers a common forum bringing together researchers, engineers, and architects to discuss the complex interactions of massively parallel hardware, novel programming models, efficient graphics algorithms, and innovative applications.

The program features three days of paper and industry presentations, with ample time for discussions during breaks, lunches, and the  conference banquet. The conference, which will take place on June 25-27, is co-located with Eurographics Rendering Symposium on the campus of the Max-Planck  Institut Informatik, Saarland University, Saarbrucken, Germany.

Original and innovative performance-oriented contributions are invited from all areas of graphics, including hardware architectures, rendering, physics, animation, AI, simulation, data structures, with topics including (but not limited to):

• New graphics hardware architectures
• Rendering architectures and algorithms
• Parallel computing for graphics (including GPU Computing)
• Algorithmic foundations
• Languages and compilation

The conference website with additional information is located at http://www.highperformancegraphics.org.

Molecular Workshop Series – Running and Developing MD Algorithms on GPUs with OpenMM and PyOpenMM + Intro to MD and Trajectory Analysis

Simbios is excited to announce its upcoming Molecular Dynamics (MD) Workshop Series, highlighting new capabilities within the recently released OpenMM 1.0 and introducing PyOpenMM for rapid MD code development with high performance:

Day 1: Running and Developing MD Algorithms on GPUs with OpenMM
Day 2: Introduction to MD and Trajectory Analysis with Markov State Models

When: March 1-2, 2010 (sign up for one or two days)
Where: Stanford University

Registration is free but required and spaces are limited. Please visit http://simbios.stanford.edu/MDWorkshops.htm for the workshop agenda and to register.

RIKEN, one of the most prestigious research institutes in Japan, is the site of an upcoming computing workshop to be keynoted by NVIDIA CEO Jen–Hsun Huang. RIKEN conducts research across a wide range of fields, including physics, chemistry, medical science, biology, and engineering. The workshop will be held 1/28/10 – 1/29/10. See https://reg-nvidia.jp/public/seminar/view/3 for full details.  In addition to keynote speeches by Jen-Hsun Huang and Professor Takayuki Aoki from Tokyo Institute of Technology, guest speakers at the event include Prof. Lorena Barba from Boston University, Mr. Mr. Eiji Fujii from Square ENIX, Dr. Mark Harris from NVIDIA (and GPGPU.org), and Dr. James Phillips from The University of Illinois at Urbana-Champaign.

From the workshop webpage:

“Accelerated Computing” is an old concept that is recently redefined in High-Performance Computing. It was started by dedicated machines like GRAPEs, but a great revolution has been occurring fueled by recent advancement in GPU Computing, both in hardware and in software such as CUDA C and OpenCL. This conference aims to review cutting edge technologies and scientific applications, as well as to discuss the future of the “Accelerator” approach in scientific and industrial HPC. Please join the conference for fruitful discussions on the future of HPC with highly-parallel processors.

This workshop will be held in conjunction with CIT 2010, Bradford, UK, 29 June – 01 July, 2010.  From the announcement:

We are undergoing a new revolution in parallel processor technologies, especially the Graphics Processing Units. GPUs have become widely used nowadays to accelerate a broad range of applications, including computational finance, numerical computing, image/video processing, engineering simulations, quantum chemistry, just to name a few.
The goal of this workshop is to provide a forum for researchers and practitioners to discuss and share their research and development experiences and outputs on the massively parallel GPU platforms, software development tools, optimization techniques, parallel algorithm design, and all kinds of successful applications. We solicit original and previously unpublished papers addressing research challenges and advances towards the design, implementation and evaluation of massively parallel GPU computing.

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Second USENIX Workshop on Hot Topics in Parallelism (HotPar ’10)
June 14-15, Berkeley, CA

Website: http://www.usenix.org/event/hotpar10/

Following the tremendous success of HotPar ’09, the Second USENIX Workshop on Hot Topics in Parallelism (HotPar ’10) will once again bring together researchers and practitioners doing innovative work in the area of parallel computing. Multicore processors are the pervasive computing platform of the future. This trend is driven by limits on energy consumption in computer systems and the poor energy performance of conventional microprocessors. Parallel architectures can potentially mitigate these problems, but this new computer architecture will only be successful if languages, systems, and applications can take advantage of parallel hardware. Navigating this change will require new concurrency-friendly programming paradigms, new methods of application design, new structures for system software, and new models of interaction between applications, compilers, operating systems, and hardware.

Submissions

We request submissions of position papers that propose new directions for research of products in these areas, advocate non-traditional approaches to the problems engendered by parallelism, or potentially generate controversy and discussion. We encourage submissions from practitioners as well as from researchers. Read the rest of this entry »

CALL FOR PAPERS: GPGPU-3
General-purpose Processing on Graphics Processing Units

http://www.ece.neu.edu/groups/nucar/GPGPU

March 14, 2010
Pittsburgh, PA
Held in cooperation with ASPLOS XV

Overview:

Graphics cards have long been used to accelerate gaming and 3D graphics applications. More recently, they have begun to be used to accelerate more general-purpose and high-performance applications. GPUs are beginning to be used to accelerate a wide range of remote sensing, environmental monitoring, business forecasting and medical imaging applications. We have begun to see an explosion in the number of general-purpose programming environments become available that allow these platforms to be used to accelerate a wider class of applications.

The goal of this workshop is to provide a forum to discuss these general-purpose programming environments and platforms, as well as describe successful applications that have leveraged this approach to acceleration. This year’s workshop is particularly interested in code/compiler optimizations, supercomputing environments, and virtualization techniques that lower the barrier to successfully utilizing these platforms.

Topics of interest include, but are not limited to: Read the rest of this entry »

Multi- and many-core microprocessors are being deployed in a broad spectrum of applications including Clusters, Clouds and Grids. Both conventional multi- and many-core processors, such as Intel Nehalem and IBM Power7 processors, and unconventional many-core processors, such as NVIDIA Tesla and AMD FireStream GPUs, hold the promise of increasing performance through parallelism. However, GPU approaches in parallelism are distinctly different from those of conventional multi- and many-core processors, which raises new challenges: For example, how do we optimize applications for conventional multi- and many-core processors? How do we reengineer applications to take advantage of GPUs’ tremendous computing power in a reasonable cost-benefit ratio? What are effective ways of using GPUs as accelerators? The goals of this workshop are to discuss these and other issues and bring together developers of application algorithms and experts in utilizing multi- and many-core processors. Accepted papers will be published in the CCGRID proceedings. Selected papers will be published in a special issue of the Journal Concurrency and Computation: Practice and Experience.

Topics of interests include (but not limited to): Read the rest of this entry »

Remote Access: GoToMeeting
Date & Time: Thursday, December 10 at 15:00 CST

Abstract:

OpenCL is a new industry standard programming system for developing parallel programs that typically execute on heterogeneous computing systems. OpenCL has much in common with NVIDIA´s CUDA programming toolkit, but differs in a number of important respects as a result of its goal of supporting a broader range of target hardware platforms. This talk will introduce OpenCL and provide some basic comparisons with other programming systems.

Bio: John Stone is a Senior Research Programmer in the Theoretical and Computational Biophysics Group at the Beckman Institute for Advanced Science and Technology. Mr. Stone is the lead developer of VMD, a high performance molecular visualization tool used by researchers all over the world. His research interests include molecular visualization, GPU computing, parallel processing, ray tracing, haptics, and virtual environments.

Click here to register for the webinar.

High throughput architectures for HPC seem likely to emphasize many cores with deep multithreading, wide SIMD, and sophisticated memory hierarchies. GPUs present one example, and their high throughput has led a number of researchers to port computationally intensive applications to NVIDIA’s CUDA architecture.

This session explored the art of performance tuning for CUDA using several case studies. Topics included profiling to identify bottlenecks, effective use of the GPU’s memory hierarchy and DRAM interface to maximize bandwidth, data versus task parallelism, and avoiding SIMD divergence.  Many of the lessons learned in the context of CUDA are likely to apply to other many-core architectures used in HPC applications.

The presentation slides from the Supercomputing 2009 full-day tutorial “High-Performance Computing with CUDA” are now available at http://gpgpu.org/sc2009.

Abstract:

NVIDIA’s CUDA is a general-purpose architecture for writing highly parallel applications. CUDA provides several key abstractions—a hierarchy of thread blocks, shared memory, and barrier synchronization—for scalable high-performance parallel computing. Scientists throughout industry and academia use CUDA to achieve dramatic speedups on production and research codes. The CUDA architecture supports many languages, programming environments, and libraries including C, Fortran, OpenCL, DirectX Compute, Python, Matlab, FFT, LAPACK, etc.

In this tutorial NVIDIA engineers will partner with academic and industrial researchers to present CUDA and discuss its advanced use for science and engineering domains. The morning session will introduce CUDA programming, motivate its use with many brief examples from different HPC domains, and discuss tools and programming environments. The afternoon will discuss advanced issues such as optimization and sophisticated algorithms/data structures, closing with real-world case studies from domain scientists using CUDA for computational biophysics, fluid dynamics, seismic imaging, and theoretical physics.