Panoptes traces targeted programs by library interposition at runtime. Interactions with the GPU are intercepted, annotated as necessary, and are then sent to the actual CUDA library for execution on the device. This approach gives an analysis tool built on Panoptes a complete view of the state of the GPU without additional developer effort. In contrast, developer-added instrumentation may be incomplete due to errors of omission or cause maintenance difficulties, particularly for large code bases.

By directing annotated instructions to the GPU for execution rather than relying on the host for emulation, Panoptes is able to analyze programs at scale. The rift in parallel execution capabilities between modern GPUs and CPUs carries into testing and debugging as well. For computationally intensive tasks brought to the GPU explicitly for its parallelism, resorting to host-based emulation may necessitate reduced or simplified inputs for analysis. More details: http://github.com/ckennelly/panoptes

NVIDIA Kepler GK110 Die Shot

This white paper describes the new Kepler  GK110 Architecture from NVIDIA.

Comprising 7.1 billion transistors, Kepler GK110 is not only the fastest, but also the most architecturally complex microprocessor ever built. Adding many new innovative features focused on compute performance, GK110 was designed to be a parallel processing powerhouse for Tesla® and the HPC market.

Kepler GK110 will provide over 1 TFlop of double precision throughput with greater than 80% DGEMM efficiency versus 60‐65% on the prior Fermi architecture.

In addition to greatly improved performance, the Kepler architecture offers a huge leap forward in power efficiency, delivering up to 3x the performance per watt of Fermi.

The paper describes features of the Kepler GK110 architecture, including

• Dynamic Parallelism;
• Hyper-Q;
• Grid Management Unit;
• NVIDIA GPUDirect™;
• New SHFL instruction and atomic instruction enhancements;
• New read-only data cache previously only accessible to texture;
• Bindless Textures;
• and much more.

More information, including a free trial version: http://www.cuvilib.com/

First, let INCITE know you are interested in GPU acceleration by completing a two-minute survey. Then determine if you want to submit a formal proposal by June 27, 2012.

Need help drafting your proposal? Attend a “how-to” webinar on Tuesday, April 24 to learn tips and tricks for drafting your proposal. For further questions about the call for proposals, please contact the INCITE manager at INCITE@DOEleadershipcomputing.org.

1. April 10th, 10AM PDT: Introducing Portable Parallelism

• C and C++ APIs
• OpenCL Memory Spaces
• The OpenCL Execution Model

2. April 24th, 10AM PDT: Coordinating OpenCL Computations on one more Heterogeneous Devices

• How to Concisley Utilize Multiple Command Queues and Coordinate Tasks Across Multiple Heterogeneous Devices such as two GPU + CPU
• Code Sample Discussion: Massively Parallel Random Number Test Framework

3. May 1st, 10AM PDT: Accelerate Rendering by an Order of Magnitude with OpenCL, Plus a View to the Multi-core and Web-enabled Future

• How to use OpenCL to Provide High-Quality, Fast Rendering in Combination with Primitive Restart
• Device Fission, Partitioning Hardware Capabilities for Optimal Resource Usage
• Looking to the Future – WebCL

Registration is limited. More Information: http://developer.amd.com/zones/OpenCLZone/Events/pages/OpenCLWebinars.aspx

PORTLAND, Ore., March 5 — The Portland Group, a wholly-owned subsidiary of STMicroelectronics, today announced availability of the 2012 release of the PGI line of high-performance parallelizing compilers and development tools for Linux, OS X and Windows. PGI 2012 is the first general release to include support for the OpenACC directive-based programming model for NVIDIA CUDA-enabled Graphics Processing Units (GPUs). This release is also the first to include the fully feature-enabled PGI CUDA C/C++ compiler for multi-core x64 CPUs from Intel and AMD. In addition, PGI 2012 includes a number of performance and feature enhancements for multi-core x64 processor-based HPC systems.

Delivered by Acceleware’s Developers, who provide real world experience and examples, the training comprises classroom lectures and hands-on tutorials. Each student will be supplied with a laptop equipped with an AMD Fusion APU for the duration of the course. Small class sizes maximize learning and ensure a personal educational experience.

Register before March 6 and receive $200 off your course fee! Enter promotional code AXTEB2012.

• One of the fastest Sparse Matrix Vector Multiplication worldwide.
• Faster Conjugate Gradient and BiConjugate Gradient solvers.
• State-of-the-art CMRS format for storing sparse matrices. The format requires less memory than CRS or HYB (from CUSPARSE and CUSP).
• Faster acceleration in OpenFOAM (Computational Fluid Dynamics).

More information is available at http://speed-it.vratis.com.