GPU Systems has added an OpenCL back end implementation to its Libra Technology compiler and runtime architecture. Libra version 1.2 now supports x86/x64, OpenGL/OpenCL and CUDA compute back ends. The OpenCL back end generates dynamic code specifically for AMD GPUs. Also, the CUDA back end generator has been enhanced with Fermi capabilities and this new release brings full BLAS 1,2,3 matrix, vector, dense, sparse, complex, single/double standard math library functionality and access through a standard C programming interface & library. The high-level approach of the Libra API enables developers to easily extend existing high-level functionality from their favorite programming language.

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CAPS has recently added an OpenCL code generator to the just released 2.3 version of its HMPP directive-based hybrid compiler. Also, the CUDA back-end generator has been enhanced with Fermi capabilities and this new release brings support for more native compilers with Intel ifort/icc, GNU gcc/gfortran and PGI pgcc/pgfort compilers, enabling developers to freely use their favorite compiler with HMPP 2.3.

Based on GPU programming and tuning directives, HMPP offers an incremental programming model that allows developers with different levels of expertise to fully exploit GPU hardware accelerators in their legacy code. Read the rest of this entry »

nexiwave.com, a Speech Indexing Cloud Service company based in Boston MA, announces that it has completed the GPU-acceleration of its speech indexing service, Nexiwave 2.0. Without sacrificing accuracy of its service, nexiwave enjoys over 75% relative speed improvement (comparing a stock Sphinx4 running on a 2.5Ghz/8 core/24GB RAM server to a Sphinx4 on 2.5Ghz/Quad Core/4GB with NVIDIA GTX 470 GPU). Read the rest of this entry »

Mellanox and NVIDIA have teamed up to create a solution that enables data sharing (without expensive memory copies) between CUDA-managed host memory and Mellanox Infiniband cards. NVIDIA GPUDirect technology allows application and middleware developers to improve performance by up to 30%, by providing a shared, RDMA-accessible address space between the GPU and the interconnect.

The full press release is available here.

At ISC’10, Intel demonstrated their co-processor approach to HPC (formerly known as Larrabee, now codenamed Knights Corner). A prototype of the Intel Many Integrated Core (MIC) architecture with 32 in-order cores, each equipped with a 512-wide vector unit and connected via an on-chip coherent cache, delivered more than half a Teraflop performance for LU decomposition in a live demonstration during a keynote by Kirk Skaugen.

The full press release from ISC’10 is available here.

At the ISC 2010 conference in Hamburg, Germany, this week, NVIDIA announced new programs for the growing CUDA/GPGPU developer community:

• CUDA Certification Program – Driven by demand for qualified GPGPU engineers, this is the first program to certify expertise in massively parallel programming on GPUs.
• CUDA Research Centers – Recognizes institutions that embrace GPU Computing across multiple research fields.
• CUDA Teaching Centers – Recognizes institutions that have integrated GPU Computing techniques into their mainstream computer programming curriculum.

These programs complement the existing CUDA Center of Excellence program, which has recognized 10 premier institutions around the world. More details are available here: http://www.nvidia.com/object/io_1275409333119.html

From a white paper by GE Intelligent Platforms (Link):

This white paper describes how GPGPU technology can allow system designers to fit an unprecedented amount of processing power into a very compact package. For example, it describes four GE Intelligent Platforms 3U VPX boards with a floating point performance of 766 GFLOPS in less than 0.4 cubic feet. With configuration control and lifecycle management from a leading COTS supplier, these technologies are clearly ready for duty.

RenderStream has recently announced a 16-GPU version of their VDAC (Visual and Data Analysis Cluster) product. It includes up to 16 GPUs (dual-GPU boards) in a single rack-mountable chassis, along with independent power supply, host CPUs and memory. The individual cards have an exclusive x16 full-bandwidth PCIe connection. The full article is available here: http://blog.renderstream.com/?p=600

Geist Software Labs has released the first version of OpenCL Studio for beta testing. OpenCL Studio combines OpenCL and OpenGL into a single integrated development environment that allows you to visualize OpenCL computation using powerful 3D rendering techniques. The editor hides much of the complexity of the underlying APIs while still providing flexibility via the Lua scripting language. Integrated source code editors and debugging capabilities for OpenCL, GLSL, and Lua, as well as a toolbox of 2D user interface widgets provide a framework for a wide range of parallel programming solutions.

This year’s GPU Technology Conference (GTC 2010) will take place on Monday, Sept. 20 to Thursday, Sept. 23 at the San Jose Convention Center in San Jose, California.

Building on last year’s inaugural conference, GTC 2010 will feature an even broader and deeper selection of technical sessions, interactive tutorials, technology previews, and industry and academic presentations.

Three concurrent GPU-focused summits will occur under one roof:

• Emerging Companies Summit: A showcase for innovative startups to demonstrate products and network with VC’s and other investors.
• GPU Developers Summit: Sessions, tutorials, and presentations for developers, engineers, and scientists.
• NVIDIA Research Summit: A unique opportunity for students, professors, and researchers to present their findings and collaborate.

For more information:

• Join the GTC 2010 mailing list for updates.
• See GTC Call for Submissions to learn about submitting content.
• To inquire about being a sponsor or exhibitor, visit GTC Sponsors/Exhibitors.